Semiconductor device and manufacturing method thereof

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S149000, C438S507000, C438S273000, C438S285000, C438S268000, C257S077000, C257S080000, C257S401000, C257SE21060, C257SE21054, C257SE21062, C257SE21064

Reexamination Certificate

active

07135420

ABSTRACT:
Single crystal silicon is grown in a [100] direction to make a bulk. Next, a silicon substrate with a normal of a surface extending in an inclined direction from a [100] direction is cut from the bulk. At this time, when an angle (off-angle) of inclination of the normal is decomposed into a component in a [001] direction and a component in a [010] direction, the component in the [001] direction is made within ±0.2 degrees (excluding 0 degree). An MOS transistor with a moving direction of carriers being the [001] direction is formed on the surface of the silicon substrate. At this time, after steps existing on the surface of the silicon substrate are reconstituted by thermal treatment in a hydrogen atmosphere, a gate insulation film, a gate electrode and the like are formed.

REFERENCES:
patent: 4591889 (1986-05-01), Gossard et al.
patent: 4987094 (1991-01-01), Colas et al.
patent: 5212404 (1993-05-01), Awano
patent: 5436468 (1995-07-01), Nakata et al.
patent: 5530713 (1996-06-01), Fukagai
patent: 5833749 (1998-11-01), Moritani et al.
patent: 5886360 (1999-03-01), Ochi
patent: 5886389 (1999-03-01), Niwa
patent: 5966625 (1999-10-01), Zhong et al.
patent: 5977564 (1999-11-01), Kobayashi et al.
patent: 6066571 (2000-05-01), Usuda et al.
patent: 6645834 (2003-11-01), Akiyama
patent: 6696372 (2004-02-01), Wang et al.
patent: 2006/0131553 (2006-06-01), Yamanaka et al.
patent: 05-347256 (1993-12-01), None
patent: 08-264401 (1996-10-01), None
patent: 08-264402 (1996-10-01), None
patent: 08-264780 (1996-10-01), None
patent: 08-321443 (1996-12-01), None
patent: 09-051097 (1997-02-01), None
patent: 10-326790 (1998-12-01), None
patent: 10-335659 (1998-12-01), None
patent: 2002-003295 (2002-01-01), None
patent: 2002-091342 (2002-03-01), None
patent: 2002-151519 (2002-05-01), None
patent: 2004-152965 (2004-05-01), None
H. Sayama et al., “Effect of <100> Channel Direction for High Performance SCE Immune pMOSFET with Less Than 0.15 μm Gate Length”, IEEE, 1999.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3651388

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.