Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-10-10
2006-10-10
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
07119407
ABSTRACT:
In a method for manufacturing an FET having a gate insulation film with an SiO2equivalent thickness of 2 nm or more and capable of suppressing the leak current to 1/100 or less compared with existent SiO2films, an SiO2film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
REFERENCES:
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6140167 (2000-10-01), Gardner et al.
patent: 2002/0050608 (2002-05-01), Landheer et al.
patent: 11-135774 (1998-07-01), None
Laegu Kang, Yongjoo Jeon, Katsunori Onishi, Byoung Hun Lee, Wen-Jie Qi, Renee Nieh, Sundar Gopalan and Jack C. Lee, “Single-Layer Thin HfO2Gate Dielectric with n+—Polysilicon Gate”, 2000 Symposium on VLSI Technology Digest of Technical Papers, p. 2.
Seiichi Iwata and Akitoshi Ishizaka, “Electron Spectroscopic Analysis of the SiO2/Si System and Correlation with Metal-Oxide-Semiconductor Device Characteristics”, J. Appl. Phys., vol. 79, No. 9, May 1, 1996, pp. 6653-6713.
D.A. Buchanan, E.P. Gusev, E. Cartier, H. Okom-Schmidt, K. Rim, M.A. Gribelyuk, A. Mocuta, A. Ajmera, M. Copel, S. Guha, N. Borjarczuk, A. Callegari, C. D'Emic, P. Kozlowski, K. Chan, R. J. Fleming, P. C. Jamison, J. Brown, R. Amdi, “80 nm Poly-Silicon Gated n-FETs with Ultra-Thin Al2O3Gate Dielectric for ULSI Applications”, 2000 IEEE, pp. 2-3.
Wen-Jie Qi, Renee Nieh, Byoung Hun Lee, Laegu Kang, Yongjoo Jeon, Katsunori Onishi, Tat Ngai, Sunjay Banerjee and Jack C. Lee, “MOSCAP and MOSFET Characteristics Using ZrO2Gate Dieletric Deposited Directly on Si”, 1999 IEEE, pp. 1-2.
Hiratani Masahiko
Obata Katsunori
Shimamoto Yasuhiro
Torii Kazuyoshi
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Reed Smith LLP
Renesas Technology Corporation
Wojciechowicz Edward
LandOfFree
Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3630292