Semiconductor device and manufacturing method thereof

Details Semiconductor device and manufacturing method thereof Semiconductor device and manufacturing method thereof

2006-08-15

2006-08-15

Fahmy, Wael (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S723000, C257S773000, C257S690000

Reexamination Certificate

active

07091620

ABSTRACT:
A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.

REFERENCES:
patent: 4246595 (1981-01-01), Noyori et al.
patent: 5040052 (1991-08-01), McDavid
patent: 5107325 (1992-04-01), Nakayoshi
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5191404 (1993-03-01), Wu et al.
patent: 5258330 (1993-11-01), Khandros et al.
patent: 5272664 (1993-12-01), Alexander et al.
patent: 5346861 (1994-09-01), Khandros et al.
patent: 5347159 (1994-09-01), Khandros et al.
patent: 5398863 (1995-03-01), Grube et al.
patent: 5409865 (1995-04-01), Karnezos
patent: 5448114 (1995-09-01), Kondoh et al.
patent: 5489749 (1996-02-01), DiStefano et al.
patent: 5602059 (1997-02-01), Horiuchi et al.
patent: 5648682 (1997-07-01), Nakazawa et al.
patent: 5663106 (1997-09-01), Karavakis et al.
patent: 5668405 (1997-09-01), Yamashita
patent: 5679977 (1997-10-01), Khandros et al.
patent: 5682061 (1997-10-01), Khandros et al.
patent: 5685885 (1997-11-01), Khandros et al.
patent: 5686757 (1997-11-01), Urushima
patent: 5706174 (1998-01-01), Distefano et al.
patent: 5757078 (1998-05-01), Matsuda et al.
patent: 5760465 (1998-06-01), Alcoe et al.
patent: 5763939 (1998-06-01), Yamashita
patent: 5776796 (1998-07-01), Distefano et al.
patent: 5777387 (1998-07-01), Yamashita et al.
patent: 5777391 (1998-07-01), Nakamura et al.
patent: 5789820 (1998-08-01), Yamashita
patent: 5801446 (1998-09-01), DiStefano et al.
patent: 5834339 (1998-11-01), Distefano et al.
patent: 5863970 (1999-01-01), Ghosal et al.
patent: 5886399 (1999-03-01), Ohsawa et al.
patent: 5895965 (1999-04-01), Tanaka et al.
patent: 5990545 (1999-11-01), Schueller et al.
patent: 5994222 (1999-11-01), Smith et al.
patent: 6078097 (2000-06-01), Ohsawa
patent: 6107678 (2000-08-01), Shigeta et al.
patent: 6114192 (2000-09-01), Tsunoda et al.
patent: 6130112 (2000-10-01), Kitano et al.
patent: 6133639 (2000-10-01), Kovac et al.
patent: 0701278 (1996-03-01), None
patent: 03-057248 (1991-03-01), None
patent: 6-181236 (1992-12-01), None
patent: 6-504408 (1994-05-01), None
patent: 7-321244 (1995-12-01), None
patent: 8-070062 (1996-03-01), None
patent: 8-070082 (1996-03-01), None
patent: 8-78574 (1996-03-01), None
patent: 8-236586 (1996-09-01), None
patent: 8-306745 (1996-11-01), None
patent: 9-172033 (1997-06-01), None
patent: 9-181209 (1997-07-01), None
patent: 9-246417 (1997-09-01), None
patent: 11-054534 (1999-02-01), None
“Electric Material”, Apr. 1, 1995 (Heisei 7), Susumu Honda, pp. 22-28.
“Nikkei Microdevice”, Feb. 1, 1995, by Nikkei BPCO, pp. 96-97.
“Nikkei Microdevice”, May 1, 1994, pp. 98-102.
“Big Innovations in Mounting Technologies, Start of a Chip Size Package Era”, Nikkei Microdevices, Apr. 1997.

Affiliated with

Also associated with

Rating

Semiconductor device and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and manufacturing method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3615274