Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-03-07
2006-03-07
Le, Thao P. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S149000, C438S197000, C257S288000
Reexamination Certificate
active
07009262
ABSTRACT:
A manufacturing method of a semiconductor device which can decrease the degradation of an element due to plasma in the LDD formation process is provided. The degradation of an element due to plasma is decreased by forming an element having an LDD structure according to a manufacturing method of a semiconductor device using a hard mask. Covering the substrate by an electrically conductive film allover, the density of electric charge accumulated in a gate electrode in the plasma process such as anisotropic etching can be reduced, and the degradation due to plasma process can be reduced.
REFERENCES:
patent: 5049514 (1991-09-01), Mori
patent: 5079617 (1992-01-01), Yoneda
patent: 5276347 (1994-01-01), Wei et al.
patent: 5413961 (1995-05-01), Kim
patent: 5432108 (1995-07-01), Lee
patent: 5445987 (1995-08-01), Kuroda et al.
patent: 5459090 (1995-10-01), Yamazaki et al.
patent: 5473184 (1995-12-01), Murai
patent: 5687113 (1997-11-01), Papadas et al.
patent: 5767006 (1998-06-01), Lee
patent: 6180502 (2001-01-01), Liang
patent: 6274887 (2001-08-01), Yamazaki et al.
patent: 6297093 (2001-10-01), Borel et al.
patent: 6335231 (2002-01-01), Yamazaki et al.
patent: 6392628 (2002-05-01), Yamazaki et al.
patent: 6495406 (2002-12-01), Honeycutt
patent: 6528854 (2003-03-01), Yoshida et al.
patent: 6559036 (2003-05-01), Ohtani et al.
patent: 6613666 (2003-09-01), Ma
patent: 2001/0030322 (2001-10-01), Yamazaki et al.
patent: 2001/0035526 (2001-11-01), Yamazaki et al.
patent: 2001/0041392 (2001-11-01), Suzawa et al.
patent: 2001/0052950 (2001-12-01), Yamazaki et al.
patent: 2001/0055841 (2001-12-01), Yamazaki et al.
patent: 2002/0000551 (2002-01-01), Yamazaki
patent: 2002/0006705 (2002-01-01), Suzawa et al.
patent: 2002/0008797 (2002-01-01), Yamazaki
patent: 2002/0016028 (2002-02-01), Arao et al.
patent: 2002/0024051 (2002-02-01), Yamazaki
patent: 2002/0028544 (2002-03-01), Fujimoto
patent: 2002/0030322 (2002-03-01), Connelly
patent: 2002/0035526 (2002-03-01), Kutaragi
patent: 2002/0041392 (2002-04-01), Tokura
patent: 2002/0052950 (2002-05-01), Pillai
patent: 2002/0055841 (2002-05-01), Bi
patent: 2002/0070382 (2002-06-01), Yamazaki et al.
patent: 2002/0094614 (2002-07-01), Maeda et al.
patent: 2002/0102783 (2002-08-01), Fujimoto et al.
patent: 2002/0110941 (2002-08-01), Yamazaki
patent: 2002/0158288 (2002-10-01), Yamazaki et al.
patent: 2003/0094614 (2003-05-01), Yamazaki et al.
patent: 2004/0063256 (2004-04-01), Ishikawa
patent: 63-275181 (1988-11-01), None
S. Kishino, “Novel fundamental of semiconductor device” Ohmesha LTD, 1995, pp. 201-207.
S. Ogura et al., “Design and Characteristic of the Lightly Doped Drain-Source (LDD) Insulated Gate Field-Effect Transistor”, IEEE Transactions on Electron Devices, vol. ED-27, No. 8, 1980. P.P. 1359-1367.
U.S. Appl. No. 10/670,310, filed Sep. 26, 2003, Inventor Akira Ishikawa (English Specification with Drawings and Claims).
Huang et al., “A Novel Submicron LDD Transistor with Inverse-T Gate Structure”, IEDM, 1986, pp 742-745, 1986.
Costellia Jeffrey L.
Le Thao P.
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
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