Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2008-06-24
2008-06-24
Lateef, Marvin M. (Department: 4146)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S356000, C257S372000
Reexamination Certificate
active
07391069
ABSTRACT:
In a conventional semiconductor device, for example, a MOS transistor, there is a problem that a parasitic transistor is prone to be operated due to an impurity concentration in a back gate region and a shape of diffusion thereof. In a semiconductor device of the present invention, for example, a MOS transistor, a P type diffusion layer5as the back gate region, and an N type diffusion layer8as a drain region, are formed in an N type epitaxial layer4. In the P type diffusion layer5, an N type diffusion layer7as a source region and a P type diffusion layer6are formed. The P type diffusion layer6is formed by performing ion implantation twice so as to correspond to a shape of a contact hole15. Moreover, impurity concentrations in surface and deep portions of the P type diffusion layer6are controlled. By use of this structure, a device size is reduced, and an operation of a parasitic NPN transistor is suppressed.
REFERENCES:
patent: 6927452 (2005-08-01), Shin et al.
patent: 09-139438 (1997-05-01), None
patent: 2001-119019 (2001-04-01), None
patent: 2002-026328 (2002-01-01), None
Kanda Ryo
Kikuchi Shuichi
Otake Seiji
Fish & Richardson P.C.
Harriston William A.
Lateef Marvin M.
Sanyo Electric Co,. Ltd.
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