Semiconductor device and manufacturing method thereof

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365149, G11C 1124

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active

053413245

ABSTRACT:
A gate electrode of a P-channel MOS transistor and a gate electrode of an N-channel MOS transistor which constitute a logic section, a gate electrode of an N-channel MOS transistor and a capacitor electrode which constitute a memory cell section are formed by patterning a first layer of polysilicon, so that the semiconductor device can be manufactured in a considerably simplified process as an SRAM, while taking advantage of the large capacity of a DRAM thereby to improve the yield.

REFERENCES:
patent: 4887135 (1989-12-01), Cheney et al.
patent: 4929989 (1990-05-01), Hayano
patent: 5047985 (1991-09-01), Miyaji
patent: 5181188 (1993-01-01), Yamachi

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