Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2007-04-17
2007-04-17
Luu, Chuong Anh (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S686000, C257S777000, C257S790000
Reexamination Certificate
active
10649940
ABSTRACT:
A semiconductor device is disclosed which comprises a plurality of semiconductor chips having a plurality of terminals, two chip mounting bases on each of which at least one of the semiconductor chips is mounted and a plurality of chip interconnections electrically connected to the terminals of the mounted semiconductor chip are formed into substantially the same pattern and which are stacked in two layers, one interconnection base which is interposed between the two chip mounting bases and on which a plurality of intermediate interconnections electrically connected to the chip interconnections are formed into a pattern different from the pattern of the chip interconnections, and a plurality of interlevel interconnections which are formed in a plurality of through holes extending through the chip mounting bases and the interconnection base at once along a stacking direction and electrically connect the chip interconnections and the intermediate interconnections.
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Notification of Reasons for Rejection from Japanese Patent Office dated Aug. 19, 2005 in Japanese Application No. 2002-254128, and English translation thereof.
Oyama et al.; “Laminated-Chip Semiconductor Device”; U.S. Appl. No. 10/156,819, filed May 30, 2002.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Luu Chuong Anh
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