Semiconductor device and manufacturing method of the same

Details Semiconductor device and manufacturing method of the same Semiconductor device and manufacturing method of the same

2007-05-01

2007-05-01

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S041000

Reexamination Certificate

active

11203062

ABSTRACT:
A semiconductor device has a plurality of universal logic cells, a power supply line, a ground line, a first interconnection and a second interconnection. Each universal logic cell includes first to seventh nodes formed in a top layer of common interconnection layers which are allocated to the universal logic cells. The first interconnection connects the third node, the fourth node and the fifth node, and the second interconnection connects the power supply line and the first node. Or, the first interconnection connects the second node, the sixth node and the seventh node, and the second interconnection connects the ground line and the first node. The first and second interconnections are formed in a customize interconnection layer provided on the common interconnection layers.

REFERENCES:
patent: 6674307 (2004-01-01), Mizuno
patent: 6943584 (2005-09-01), Aoki
patent: 6977521 (2005-12-01), Wang
patent: 2545461 (1996-07-01), None
patent: 2002-198801 (2002-07-01), None

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