Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2005-04-05
2005-04-05
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S784000
Reexamination Certificate
active
06876077
ABSTRACT:
Improve the productivity and cost for the manufacturing of a semiconductor device referred to as a wafer level CSP. The manufacturing method for a semiconductor device related to this invention contains each of the processes that form a wiring (18) for the purpose of electrically connecting each electrode pad (10a) and external connecting terminals on top of a wafer (10) on which semiconductor elements are formed, connect conductive balls that are preformed by a separate process on top of this, and next, cover the above-mentioned wafer with a resin (32) such that the upper portion of the conductive supporting posts (30) are exposed. In a later process, solder balls (34) are arranged as external connecting terminals on the upper portion of the conductive supporting posts, and in the final process, semiconductor elements are formed by dicing the above-mentioned wafer along the boundary lines of the above-mentioned semiconductor elements.
REFERENCES:
patent: 6320250 (2001-11-01), Takahashi
patent: 6559540 (2003-05-01), Kawashima
patent: 6573598 (2003-06-01), Ohuchi et al.
patent: 20010026021 (2001-10-01), Honda
Masumoto Kenji
Masumoto Mutsumi
Murata Kensho
Brady W. James
Nelms David
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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