Semiconductor device and its manufacturing method

Details Semiconductor device and its manufacturing method Semiconductor device and its manufacturing method

1998-05-15

2000-09-05

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257354, 257505, 257513, 257347, 257520, 257508, 257554, H01L 2362, H01L 2900, H01L 2701

Patent

active

061147303

ABSTRACT:
Prevents deterioration of the element characteristics of the gate voltage tolerance and the like which is caused by the metallic contaminants that are sealed in the element forming region at the time of applying a trench separator in a SOI substrate. Polysilicon 12 is formed on the side walls of the trench 5, and the metallic contaminants within the element forming region are collected in this polysilicon 12.

REFERENCES:
patent: 4571819 (1986-02-01), Rogers et al.
patent: 5045904 (1991-09-01), Kobayashi et al.
patent: 5400277 (1995-03-01), Nowak
patent: 5859466 (1999-01-01), Wada
Masatada Horiuchi and Kiyonori Ohoyu, Electrical and Crystrographical Properties of Poly-Si Interlayered (.PSI.:PSI) SOI Wafers, Reference 17, Central Research Laboratory, Hitachi Ltd., Japan, pp. 37-44.
H. D. Chiou and F. Secco d'Aragona, Gettering of Bonded SOI Layers and Microdefects In Bonded Wafers, Reference 10, Discrete and Materials Technology Group Motorola Inc., Phoenix, AZ., pp. 416-423.

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