Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2004-04-15
2008-03-11
Tran, Thien F (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
Reexamination Certificate
active
07342248
ABSTRACT:
A semiconductor device characterized in that connection pads for wire bonding are arranged at peripheral regions of an electrode terminal formation surface of a semiconductor chip, test pads for testing the semiconductor chip are arranged in an inside region surrounded by said peripheral regions of said electrode terminal formation surface, and a plurality of rewiring patterns extend from the peripheral regions to said inside region of said electrode terminal formation surface and the individual rewiring patterns connect the individual electrode terminals and the corresponding connection pads and test pads.
REFERENCES:
patent: 6534853 (2003-03-01), Liu et al.
patent: 2005/0030055 (2005-02-01), Tran et al.
patent: 2005/0173790 (2005-08-01), Akram
patent: 5-102254 (1993-04-01), None
patent: 7-122603 (1995-05-01), None
patent: 2002-151644 (2002-05-01), None
patent: 2003-84042 (2003-03-01), None
Shinko Electric Industries Co. Ltd.
Tran Thien F
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