Semiconductor device and fabrication method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

Reexamination Certificate

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C257S773000

Reexamination Certificate

active

06847124

ABSTRACT:
A semiconductor device includes: a semiconductor substrate; a bonding pad having an interconnection region that provides for an external electrical contact; a first interlayer insulating layer interposed between the semiconductor substrate and the bonding pad; and a metal wiring layer that is embedded in the first interlayer insulating layer. The metal wiring layer is made of a softer material than that of the first interlayer insulating layer. The metal wiring layer at least partially overlaps with the interconnection region in the stacked direction of the layers, and the area of metal wiring layer overlapping with the interconnection region includes notches that extend through the metal wiring layer in the stacked direction and separate the metal wiring layer in the layer direction. Portions of the first interlayer insulating layer are embedded in the notches. This enables the size of the semiconductor device to be reduced by efficiently utilizing the underlying layers of the bonding pad while preventing cracking in these layers.

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patent: 5736791 (1998-04-01), Fujiki et al.
patent: 6313540 (2001-11-01), Kida et al.
patent: 6586839 (2003-07-01), Chisholm et al.
patent: 3-1538 (1991-01-01), None
patent: 10-64945 (1998-03-01), None

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