Semiconductor device and fabrication method therefor

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S514000, C438S516000, C438S546000, C257SE21135

Reexamination Certificate

active

07138322

ABSTRACT:
An n-type channel diffused layer and an n-type well diffused layer are formed in the top portion of a semiconductor substrate, and a gate insulating film and a gate electrode are formed on the semiconductor substrate. Using the gate electrode as a mask, boron and arsenic are implanted to form p-type extension implanted layers and n-type pocket impurity implanted layers. Fluorine is then implanted using the gate electrode as a mask to form fluorine implanted layers. The resultant semiconductor substrate is subjected to rapid thermal annealing, forming p-type high-density extension diffused layers and n-type pocket diffused layers. Sidewalls and p-type high-density source/drain diffused layers are then formed.

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Der-Gao Lin et al., “The Effect of Fluorine on MOSFET Channel Length”, Oct. 1, 1993, IEEE Electron Device Letters, IEEE Service Center, New York, NY pp. 469-471, XP000397398.

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