Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Patent
1997-11-04
1999-10-26
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
257706, 257705, 257693, H01L 2334, H01L 2306, H01L 2315
Patent
active
059733985
ABSTRACT:
A semiconductor device and fabrication method are presented which employ a thermally conductive substrate having an outer layer of palladium. The substrate may be made of, for example, a metal such as copper. The substrate does not itself include layers of signal traces or bonding pads which function as device terminals, but provides a stiff backing for support of a flexible circuit which includes signal traces and bonding pads. An adhesive layer bonds the flexible circuit to the substrate. The outer layer of palladium has a desired surface roughness and chemical properties which improve the adhesion of the adhesive layer to the substrate. The substrate has opposed, substantially planar upper and underside surfaces. In one embodiment, the underside surface of the substrate has a die cavity, and the flexible circuit includes a set of conductors bonded to one side of a sheet of dielectric material (e.g., polyimide film). The sheet of dielectric material has an opening extending therethrough for receiving an upper surface of an integrated circuit. Each conductor has a first end which extends laterally across the film and into the opening and a second end which terminates at a bonding pad. The opening is surrounded by multiple apertures also which allow access to the substrate through the sheet of dielectric material for the bonding of a portion of the conductors to the substrate. The adhesive layer has openings which correspond to those of the sheet of dielectric material.
REFERENCES:
patent: 5402006 (1995-03-01), O'Donley
patent: 5550406 (1996-08-01), McCormick
patent: 5773884 (1998-06-01), Andros et al.
patent: 5854511 (1998-12-01), Shin et al.
Milad, G., Internet publication entitled, "Electroless Palladium--A Surface Finish for Interconnect Technology," Atotech USA Inc., Somerset, NJ, pp. 1-5.
Eslamy Mohammad
Jacobsen Larry L.
Clark Jhihan B
LSI Logic Corporation
Saadat Mahshid
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