Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2000-05-05
2001-09-18
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S016000, C327S333000
Reexamination Certificate
active
06292026
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and an electronic apparatus using the same. More particularly, the present invention relates to a semiconductor device that uses two types of power supply voltages, i.e., a high power supply voltage and a low power supply voltage.
2. Description of Related Art
A conventionally known semiconductor device uses two different power supply voltages, for example, a high voltage (e.g., 5V) and a low voltage (e.g., 3V). The semiconductor device is provided with a test terminal that is used to test the acceptability of the semiconductor device before shipping. When a test signal is inputted from an outside source through the test terminal, the signal is first inputted through a buffer that is operated with a high power supply voltage to internal cells of the semiconductor device that are operated with the high power supply voltage.
In order to conduct a test on internal cells that are operated with the low power supply voltage, the test signal, that is inputted through the buffer operating with the high power supply voltage, is also supplied through a buffer that is operated with the lower power supply voltage to the internal cells operating with the low power supply voltage. In this manner, one test terminal is commonly used to receive test signals to test the plurality of internal cells that are operated with the high power supply voltage or the low power supply voltage.
In one type of semiconductor device, an input terminal of the input circuit is pulled up or down based on a logic on the test terminal in a normal operation mode, other than a test mode. In this case, a test signal may be transmitted to control the pull-up operation or the pull-down operation in a manner similar to the one described above in which a test signal is transmitted to the internal cells that are operated with the high power supply voltage or the low power supply voltage. For example, when the input terminal that receives a signal having an amplitude of a low voltage is pulled up, a test signal is transmitted through a buffer that is operated with a high power supply voltage. Then, the test signal is conducted to a gate of a transistor through a buffer that is driven with a low power supply voltage. The transistor is turned on or off to control the pull-up operation of the input terminal.
However, in recent years, transistors may be driven only with a low power supply voltage while a high power supply voltage is cut off in order to reduce the power consumption. Even in this case, a test signal is once inputted in a buffer that is driven with a high power supply voltage. However, the buffer cannot operate because the high power supply voltage is cut off. As a result, the logic of the test signal cannot be correctly transmitted to circuits that are operated with the low power supply voltage. This means that the necessary pull-up operation and pull-down operation for the input terminal cannot be accomplished when the transistors are driven only with a low power supply voltage with a high power supply voltage being cut off during the normal operation.
To solve the problems described above, independent test terminals may be provided respectively for a circuit that is driven with a high power supply voltage and a circuit that is driven with a low power supply voltage.
A semiconductor device manufacture requires test terminals. However, the user who purchases and uses the semiconductor device does not require such test terminals. Moreover, the number of external terminals of a semiconductor device is limited by the size of its circuit and the standard to be employed. Accordingly, the number of test terminals cannot readily be increased more than the presently available number.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device and an electronic apparatus using the semiconductor device that can select either a mode in which the device is driven with two types of power supply voltages, i.e., a high power supply voltage and a low power supply voltage, or a mode in which the device is driven only with a low power supply voltage. It is also an object of the present invention to provide a semiconductor device that has a minimum number of terminals for inputting and/or outputting signals.
It is also an object of the present invention to provide a semiconductor device and an electronic apparatus using the semiconductor device that can pull up or pull down input terminals even when the device is driven only with a low power supply voltage.
In accordance with one embodiment of the present invention, a semiconductor device include a first terminal, a second terminal, a third terminal, a level shifter, a first transmission circuit and a second transmission circuit. The first terminal receives a first power supply voltage, the second terminal receives a second power supply voltage that is greater than the first power supply voltage, and the third terminal receives a first signal having an amplitude relating to the first power supply voltage. The level shifter shifts a level of the first signal that is inputted in the third terminal based on the second power supply voltage to generate a second signal. The first transmission circuit is operated with the first power supply voltage and transmits the first signal. The second transmission circuit is operated with the second power supply voltage and transmits the second signal provided from the level shifter.
In accordance with one embodiment of the present invention, even when a high voltage, i.e., the second power supply voltage, is cut off, the first signal from the third terminal is transmitted by the first transmission circuit that is operated with the first power supply voltage. Therefore, the second power supply voltage that is a high voltage can be cut off, and yet the device can be operated only with the first power supply voltage that is a low voltage with a lower power consumption.
The semiconductor device may further includes a first control circuit that is operated by the first power supply voltage and performs control based on a logic of the first signal, and a second control circuit that is operated by the second power supply voltage and performs control based on a logic of the second signal. In this case, the first transmission circuit transmits the first signal to the first control circuit, and the second transmission circuit transmits the second signal to the second control circuit.
Accordingly, even when the second power supply voltage that is a high voltage is cut off, the first control circuit is effectively operated.
The semiconductor device may further comprise an input circuit including an input terminal that receives a third signal having an amplitude relating to the second power supply voltage. The second control circuit pulls up the input terminal to the second power supply voltage or releases the input terminal therefrom based on a logic of the second signal.
The input circuit may preferably include a buffer circuit that is operated with the first power supply voltage, and a circuit that compulsorily sets an output from the buffer circuit to the first power supply voltage when the supply of the second power supply voltage to the second terminal is cut off. As a result, even when the second power supply voltage that is a high voltage is cut off, an output from the input circuit can be fixed at a voltage that is pulled up to the first power supply voltage.
The second control circuit may include a circuit that pulls down the input terminal to a reference voltage or releases the input terminal therefrom based on a logic of the second signal. In this case, the input circuit may preferably include a buffer circuit that is operated with the first power supply voltage, and a circuit that compulsorily sets an output from the buffer circuit to the reference voltage when the supply of the second power supply voltage to the second terminal is cut off. As a result, even when the second power supply voltage that
Chang Daniel D.
Hogan & Hartson L.L.P.
Seiko Epson Corporation
Tokar Michael
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