Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Reexamination Certificate
2006-02-22
2008-12-16
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including level shift or pull-up circuit
C365S230060, C365S185230
Reexamination Certificate
active
07466605
ABSTRACT:
A non-volatile semiconductor device provides a pull-up transistor (M1) for a word line drive which can be downsized. The semiconductor device includes a first decoder (109) including a pull-up transistor (M1) selecting and driving a word line (P2WL) connected to memory cells, a first voltage generating circuit (102) generating a first voltage applied to a source terminal of the pull-up transistor (M1), a second voltage generating circuit (105) generating a second voltage that is applied to a gate terminal of the pull-up transistor (M1), is the second voltage higher than the first voltage, sectors including the memory cells, a vertical word line (VWL) connecting the sectors in a vertical direction and carrying the first voltage to the source terminal of the pull-up transistor (M1), a global word line (GWL) connecting the sectors in a lateral direction and carrying the second voltage to the gate terminal of the pull-up transistor (M1), a second decoder (108) selecting and driving the global word line (GWL), and a third decoder (104) selecting and driving the vertical word line (VWL).
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Murakami Hiroki
Shimizu Atsushi
Ingrassia Fisher & Lorenz P.C.
Nguyen Dang T
Spansion LLC
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