Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1991-10-03
1994-08-23
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257351, 257382, 257384, 257900, H01L 2701, H01L 2910, H01L 2702, H01L 2348
Patent
active
053410289
ABSTRACT:
A semiconductor device of a field effect transistor having an SOI structure is formed as below. Using a gate electrode 20 as a mask, n type impurities are implanted into an SOI layer of p type to form additional source/drain regions of intermediate concentration. Then, a relatively thin sidewall spacer is formed at the sidewall of the gate electrode. Using the sidewall spacer as a mask, a titanium silicide layer is formed in self-alignment on the surface of the SOI layer. Next, a relatively thick sidewall spacer is formed. Using this sidewall spacer as a mask, n type impurities are implanted to form a source/drain region of high concentration. According to this manufacturing step, over-etching of the source/drain region are prevented in performing anisotropic etching at the time of sidewall spacer formation.
REFERENCES:
patent: 4873557 (1989-10-01), Kita
patent: 5040037 (1991-08-01), Yamaguchi et al.
"SOI Technology", Ouyou Batsuri (Applied Physics), vol. 54, No. 12, Nishimura et al., 1985.
"SOI Technology", Ouyou Butsuri (Applied Physics), vol 54, No. 12, by Tadashi Nishimura et al, pp. 1274-1283, 1985.
Ajika Natsuo
Yamaguchi Yasuo
Yamano Tsuyoshi
Mitsubishi Denki & Kabushiki Kaisha
Prenty Mark V.
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