Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-12-19
2004-11-02
Thai, Luan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S724000, C257S726000, C257S778000, C257S784000
Reexamination Certificate
active
06812565
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method of manufacturing the same and particularly to the technology which can be effectively applied to a multi-chip module in which a plurality of semiconductor chips including a memory chip are mounted on a wiring board.
In a manufacturing process of a multi-chip module in which a memory chip and a control chip for controlling operations of the memory chip are mounted on a wiring board, a bonding option for switching the functions of memory chip such as word configuration, operation mode and refresh cycle by changing the connecting pattern of wires on the occasion of loading a memory chip on the wiring board and then connecting these elements with wires is conducted. However, this bonding option system cannot change the functions after the memory chip is once mounted to the wiring board.
The Japanese unexamined patent publication No. Hei 9(1997)-293938 describes a memory module which can switch various functions such as refresh cycle, operation mode and word configuration on the wiring board. Switchover of these functions can be realized by inputting any signal (function switching signal) of the power supply voltage, ground potential and non-connect (open) signals to a bonding pad for switching the functions formed on a memory chip.
On the wiring board, a function switching means for freely switching the function switching signal explained above is provided and various functions of all memory chips mounted on the wiring board can be switched at a time by freely switching the function switching signal using the function switching means. The function switching means is composed of a plurality of lands formed on the wiring board and conductivity chips which can be mounted on these lands. The function switching signal is determined depending on whether the conductivity chip is mounted to the predetermined lands or not.
Meanwhile, the technology so-called wafer process package WPP or wafer level CSP are also known, in which the packaging process (post-process) is integrated with a wafer process (pre-process) and the processes up to the packaging process is completed under the wafer condition. In this technology, the packaging process is executed by application of the wafer process. Therefore, this technology provides advantages that the number of processes can be reduced and the package size can also be reduced in comparison with the prior art method in which the packaging process is conducted for each chip sliced from the wafer. This wafer process package is described in the “Electronics Loading Technique” Special Edition of 2000, PP 81 to 113, issued by Technical Research Association (May 28, 2000).
SUMMARY OF THE INVENTION
In the case of wafer process packaged explained above, since an external connecting terminal (solder bump) is formed with the wafer process, after the wafer is divided to chips, various functions of memory such as refresh cycle, operation mode and word configuration cannot be varied. Therefore, different kinds of memory chips must be prepared for each function, resulting in the disadvantage that wafer process and stock management of chips are complicated.
Moreover, it is sometime requested by user for the multi-chip module that memory functions is changed after the memory chip is mounted to the wiring board, but when a memory chip is the wafer process package, functions of memory cannot be varied after the memory chip is mounted on the wiring board.
It is therefore an object of the present invention to provide a multi-chip module which can vary the functions of memory chip at the time of loading a memory chip having formed an external connecting terminal with the wafer process to the wiring board.
Another object of the present invention is to provide a multi-chip module which can vary functions of memory chip after the memory chip having formed external connecting terminal with wafer process is mounted to the wiring board.
Another object of the present invention is to provide the technique for improving reliability of multi-chip module loading the memory chip having formed external connecting terminal with wafer process to the wiring board.
The aforementioned objects and other novel features of the present invention will become apparent from the description of the present specification and accompanying drawings.
The typical inventions disclosed in the present invention will be briefly explained below.
The semiconductor device of the present invention is a multi-chip module in which a plurality of semiconductor chips including memory chips are mounted on a wiring board, this memory chip comprises an integrated circuit including a plurality of memory elements, a plurality of electrodes electrically connected to the integrated circuit, an insulation layer which is formed covering the integrated circuit to expose a plurality of electrodes, a plurality of wires formed on the insulation layer and electrically connected respectively to a plurality of electrodes and a plurality of external connecting terminals formed on the insulation layer and electrically connected respectively to a plurality of wires, and a plurality of external connecting terminals include an external connecting terminal for switching the functions for switching the predetermined functions of the integrated circuit depending on a voltage level of the input signal and switching the predetermined function of the integrated circuit by supplying the signal of the predetermined voltage level to the external connecting terminal for switching the function of the memory chip through the wiring board.
Further, a method of manufacturing a semiconductor device comprises the steps of:
(a) preparing a plurality of memory chips, each memory chip including: an integrated circuit including a plurality of memory elements; a plurality of electrodes electrically connected to the integrated circuit; an insulation layer formed covering the integrated circuit and exposing the plurality of electrodes; a plurality of wirings formed at the upper part of the insulation film and electrically connected respectively with the plurality of electrodes; and a plurality of external connecting terminals including a function switching external connecting terminal formed at the upper part of the insulation film, electrically connected respectively to the plurality of wirings, and switching a function of the integrated circuit to the predetermined function depending on a voltage level of an input signal;
(b) preparing the first wiring board for supplying a signal of the first voltage level to the function switching external connecting terminal of the memory chip and the second wiring board for supplying a signal of the second voltage level to the function switching external connecting terminal of the memory chip; and
(c) manufacturing a plurality of kinds of multi-chip modules having the different functions by loading a part of the plurality of memory chips to the first wiring board and then loading the other part thereof to the second wiring board.
Further, in the method, the first wiring board and the second wiring board are different from each other in the wiring pattern connected to the function switching external connecting terminal of the memory chip.
Further, the method comprises a step of loading, on the first wiring board, the first semiconductor chip for supplying the signal of the first voltage level to the function switching external connecting terminal of the memory chip and also loading, on the second wiring board, the second semiconductor chip for supplying the signal of the second voltage level to the function switching external connecting terminal of the memory chip.
Further, the method comprises a step of supplying the sealing resin respectively to a gap between the memory chip and the first wiring board and a gap between the memory chip and the second wiring board.
REFERENCES:
patent: 6388318 (2002-05-01), Iwaya et al.
patent: 9-293938 (1997-11-01), None
Technical Research Association, May 28, 2000, “Electronics Loading Te
Katagiri Mitsuaki
Nishimoto Kenji
Mattingly Stanger & Malur, P.C.
Thai Luan
LandOfFree
Semiconductor device and a method of manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and a method of manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and a method of manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3357193