Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2001-07-18
2002-10-22
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S149000, C438S159000, C438S197000, C438S283000, C438S593000
Reexamination Certificate
active
06468887
ABSTRACT:
BACKGROUND OF THE INVENTION
1. [Field of the Invention]
The present invention relates to a so-called DELTA (DEpleted Lean channel TrAnsistor) semiconductor device and a method of fabricating the same.
2. [Description of the Related Art]
A so-called DELTA semiconductor element has attracted attention as a semiconductor element meeting demands for a finer diffusion layer and a higher integration degree in recent years. This semiconductor element has an SOI structure in which a pillar projecting semiconductor layer is formed on a semiconductor substrate via an insulating layer for element isolation, a gate electrode is formed to cover a central portion of this semiconductor layer via a gate insulating film, and a source and a drain are formed in the semiconductor layer on the two sides of the gate electrode. A channel between the source and the drain is depleted to achieve high drivability.
More specifically, Japanese Patent Laid-Open No. 6-310595 has disclosed a method of forming an element isolation region above a semiconductor substrate including a pillar projection by ion-implanting oxygen into the semiconductor substrate.
Also, Japanese Patent Laid-Open No. 5-198817 or 4-294585 has disclosed a structure in which a gate electrode is so formed as to bury upper and lower portions of a pillar projection or a trench and a source and a drain are formed on the bottom of the trench.
Furthermore, as one example of semiconductor devices similar to the DELTA semiconductor device, Japanese Patent Laid-Open No. 1-248557 has disclosed a semiconductor device in which a gate electrode is so formed as to surround the side surfaces of a pillar projection formed on a semiconductor substrate, diffusion regions serving as a source and a drain are formed on the upper surface of the pillar projection and in the semiconductor substrate around the pillar projection, and a capacitor is so formed as to be connected to the diffusion region on the upper surface of the pillar projection.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 6-310595, however, an element isolation insulating film must be formed on a semiconductor substrate, although the film is not a thick oxide film such as a field oxide film formed by a LOCOS process. This unavoidably complicates the fabrication process.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 5-198817 or 4-294585, only a source and a drain are formed in upper and lower portions of a pillar projection formed on a semiconductor substrate. That is, this device structure does not meet demands for multiple channels in recent years.
In the semiconductor device disclosed in Japanese Patent Laid-Open No. 1-248557, agate electrode is so formed as to cover the side surfaces of a pillar projection by anisotropic etching. Therefore, it is impossible to make the film thickness and the shape of the gate electrode uniform. Consequently, the shape of the gate electrode becomes very difficult to control as the dimensions of an element are further decreased.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device having three channels corresponding to a pair of a source and a drain, selectively formed on the same semiconductor substrate as a common bulk transistor, and having a very fine structure and high drivability, and a method of fabricating this semiconductor device.
A semiconductor device of the present invention is a semiconductor device comprising a gate, a source, and a drain, wherein a surface of a semiconductor substrate is processed into a shape having a pillar projection which functions as an element active region, the gate is formed via a gate insulating film so as to cover a substantially central portion of a surface of the pillar projection, the source and drain are formed by doping an impurity into portions of the pillar projection on two sides of the gate, and an element isolation insulating film is so formed on the semiconductor substrate as to bury side surfaces of the pillar projection, and said gate electrode is formed between at least a part of side surfaces of said element isolation insulating film and said pillar projection, with in a space between side surfaces of said element isolation insulating film and a gate insulating film formed on the side surfaces of said pillar projection.
Another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, a conductive film formed by patterning via a first insulating film so as to cover a substantially central portion of a surface of the pillar projection, a pair of diffusion regions formed by doping an impurity into portions of the pillar projection on two sides of the conductive film, and a second insulating film so formed on the semiconductor substrate as to bury side surfaces of the pillar projection, and said conductive film comprises an extension portion extending on said second insulating film.
Still another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, first and second conductive films formed via a first insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and opposing each other while electrically isolated from each other, a third conductive film formed via a second insulating film so as to cover a substantially central portion of an upper surface of the pillar projection and electrically isolated from the first and second conductive films, a pair of diffusion regions formed by doping an impurity into portions of the pillar projection on two sides of the first, second, and third conductive films, and a third insulating film so formed on the semiconductor substrate as to bury the side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention comprises a semiconductor substrate processed into a shape having an integrally formed pillar projection on a surface, first and second conductive films formed via a first insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and opposing each other while electrically isolated from each other via the first insulating film and the pillar projection, diffusion regions formed by doping an impurity into an upper surface region of the pillar projection and a surface region of the semiconductor substrate below the first and second conductive films formed via the first insulating film, and a second insulating film so formed on the semiconductor substrate as to bury the side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention is a semiconductor device comprising a semiconductor substrate and first, second, and third transistors having first, second, and third gates and a source and a drain shared by the first, second, and third gates, wherein the semiconductor substrate is processed into a shape having a pillar projection which functions as an element active region on a surface, the first and second gates are formed via a first gate insulating film so as to cover substantially central portions of two side surfaces of the pillar projection and oppose each other while electrically isolated from each other, the third gate is formed via a second gate insulating film so as to cover a substantially central portion of an upper surface of the pillar projection and electrically isolated from the first and second gates, the source and drain are formed by doping an impurity into portions of the pillar projection on two sides of the first, second, and third gates, and an element isolation insulating film is so formed on the semiconductor substrate as to bury side surfaces of the pillar projection.
Still another aspect of the semiconductor device of the present invention is a semiconductor device comprising a semiconducto
Iwasa Shoichi
Kawamata Tatsuya
Connolly Bove & Lodge & Hutz LLP
Nippon Steel Corporation
Trinh Michael
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