Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2007-11-20
2007-11-20
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S698000, C257S777000, C257SE23011, C257SE23067, C257SE23174
Reexamination Certificate
active
11216144
ABSTRACT:
A semiconductor device includes a substrate having first and second surfaces, the substrate having an opening; a first adhesive layer provided on the first surface; a second adhesive layer provided under the second surface; a third adhesive layer provided around the opening; a semiconductor chip arranging a plurality of chip bonding pads in a central portion of the semiconductor chip and adhered on the third adhesive layer; substrate bonding pads adhered under the second adhesive layer; bonding wires connecting the chip bonding pads to the substrate bonding pads; and an encapsulating resin provided around the semiconductor chip.
REFERENCES:
patent: 6747361 (2004-06-01), Ichinose
patent: 2002/0089050 (2002-07-01), Michii et al.
patent: 2002/0171145 (2002-11-01), Higuchi et al.
patent: 2004/0207056 (2004-10-01), Seki et al.
patent: 2005/0017342 (2005-01-01), Morrison
patent: 2005/0073035 (2005-04-01), Moxham
Hosokawa Ryuji
Imoto Takashi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Fourson George
Kabushiki Kaisha Toshiba
LandOfFree
Semiconductor device and a method of assembling a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device and a method of assembling a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and a method of assembling a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3838442