Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2007-03-20
2007-03-20
Mai, Anh Duy (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S368000
Reexamination Certificate
active
11414267
ABSTRACT:
In addition to ordinary MOS gate, drain and source, a semiconductor element includes a control gate having geometry, which is defined only by a group of straight lines along a rectangular form of the MOS gate, is not defined by an oblique line and provides a nonuniform gate length at least in one of regions aligned in a direction of a gate width. A channel region formed by the control gate provides a region of strong electric fields and a region of weak electric fields. Consequently, a conductance of a whole channel region formed by the MOS gate and the control gate, i.e., a gain coefficient β of the semiconductor element can be modulated in accordance with voltages applied to the MOS gate and the control gate.
REFERENCES:
patent: 5821588 (1998-10-01), Ohmae
patent: 6144081 (2000-11-01), Hsu et al.
patent: 6489657 (2002-12-01), Mori
patent: 6528852 (2003-03-01), Takemura
patent: 6740938 (2004-05-01), Tsunoda et al.
patent: 6774733 (2004-08-01), Arima
patent: 6911701 (2005-06-01), Arima
patent: 2003/0006438 (2003-01-01), Arima
patent: 2003/0030081 (2003-02-01), Arima
patent: 06-005851 (1994-01-01), None
patent: 06 061481 (1994-03-01), None
patent: 06 350088 (1994-12-01), None
patent: 11-251582 (1999-09-01), None
patent: 2002-222944 (2002-08-01), None
patent: WO 02/059979 (2002-08-01), None
Chang et al., “Gate Length Scaling and Threshold Voltage Control of Double-Gate MOSFETs,”IEEE 2000, pp. 719-722.
Kim et al, “Nanoscale CMOS Circuit Leakage Power Reduction by Double-Gate Device,”IEEE 2004, pp. 102-107.
Matsuoka, H., et al. “Mesocopic Transport in Si Metalooxide—Semiconductor Field-Effect Transistors with a Dual-Gate Structure”.Journal of Applied Physics, vol. 9, pp. 5561-5566 (1994).
Hsiao, C., et al., “A Low Noise NMOSFET with Overlaid Metal Gate”. IEEE MITT-S Digest, pp. 1711-1714 (1998).
European Search Report, EP 04253515, dated May 30, 2006 (3 pages).
Hirotsu Fusayoshi
Hirotsu Junichi
Duy Mai Anh
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Fusayoshi Hirotsu
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