Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
1999-01-20
2001-12-11
Fabruyl, Wael (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
Reexamination Certificate
active
06329669
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device capable of being used in accordance with forward and reverse bending specifications, and more particularly, to a semiconductor device capable of being switched, through use of an external signal, to an upwardly-bent semiconductor device or to a downwardly-bent semiconductor device through switching of a changeover circuit provided in a semiconductor chip, as well as to a method of manufacturing the semiconductor device.
2. Description of the Related Art
In omitting stub wiring from the surface of a board (or in taking measures against a linking problem or in reducing a packaging area), there may arise a necessity for manufacturing an upwardly-bent or downwardly-bent semiconductor device. To this end, there has already been proposed a semiconductor device which has a changeover circuit provided in a semiconductor chip and which can be switched to an upwardly-bent semiconductor device or a downwardly-bent semiconductor device through switching of the changeover circuit.
Even in a case of a CSP, BGA, or FBGA semiconductor chip which cannot be manufactured into an upwardly-bent chip by bending pins upwardly or into a downwardly-bent chip by downwardly bending pins downwardly, the semiconductor chip can be manufactured into an upwardly/downwardly-bent semiconductor chip through use of a structure such that a single semiconductor device can be used as either an upwardly-bent semiconductor device or a downwardly-bent semiconductor device by means of a changeover circuit. Although such a semiconductor chip does not have any bent portions, for the sake of convenience the semiconductor chip will be explained by reference to terms related to a bend mode.
FIGS. 10A and 10B
show a conventional semiconductor device capable of being switched into an upwardly-bent or a downwardly-bent semiconductor device by means of the foregoing changeover circuit. Reference numeral
101
designates a semiconductor chip which can be switched to an upwardly-bent semiconductor chip or a downwardly-bent semiconductor chip. As shown in
FIG. 10A
, the semiconductor chip
101
can be switched to an upwardly-bent semiconductor chip through bringing an M_ENA signal to low (“L” value). Conversely, as shown in
FIG. 10B
, the semiconductor chip
101
can be switched to a downwardly-bent semiconductor chip through bringing the M_ENA signal to high (“H” value). As mentioned above, the semiconductor chip
101
shown in
FIG. 10
can be used as either the upwardly-bent or downwardly-bent semiconductor chip through switching of the M_ENA signal.
FIGS. 11A and 11B
are diagrammatic sketches, showing the interior of the conventional semiconductor device shown in
FIGS. 10A and 10B
. In the drawings, reference numeral
101
designates the semiconductor chip;
102
designates a changeover circuit which switches a connection between a pin A and an input terminal of an internal circuit
103
to a connection between a pin B and the input terminal, and vice versa; and
103
designates an internal circuit provided in the semiconductor chip. As shown in
FIG. 11A
, in an upwardly-bent mode (i.e., the M_ENA signal is low), a signal (intA) received by way of the pin A is output to an input terminal “a” of the internal circuit
103
by way of the changeover circuit
102
. Further, a signal (intB) received by way of the pin B is output to an input terminal “b” of the internal circuit
103
by way of the changeover circuit
102
.
In contrast, in a downwardly-bent mode (i.e., the M_ENA signal is high) such as that shown in
FIG. 11B
, the signal (intB) received by way of the pin A is output to the input terminal “b” of the internal circuit
103
by way of the changeover circuit
102
. Further, the signal (intA) received by way of the pin B is output to the input terminal “a” of the internal circuit
103
by way of the changeover circuit
102
.
FIGS. 12A and 12B
show the changeover circuit
102
shown in
FIGS. 11A and 11B
.
FIG. 12A
depicts the upwardly-bent mode, and
FIG. 12B
depicts the downwardly-bent mode. In the drawings, reference numeral
121
designates a register which holds the signal input from the pin A in synchronization with the high edge of a clock signal (hereinafter referred to as a “CLK signal”) and outputs the signal; and
122
designates a register which holds the signal input from the pin B in synchronization with the high edge of the CLK signal and outputs the signal.
Reference numeral
123
designates a selector which outputs the signal received by way of the register
121
to the input terminal “a” when the M_ENA signal is low and outputs the signal received by way of the register
122
to the input terminal “a” when the M_ENA signal is high.
Reference numeral
124
designates a selector which outputs the signal received by way of the register
122
to the input terminal “a” when the M_ENA signal is low and outputs the signal received by way of the register
121
to the input terminal “a” when the M_ENA signal is high.
The operation of the changeover circuit
102
will now be described.
As shown in
FIG. 12A
, when the M_ENA signal is low, the signal (intA) received by way of the pin A is output to the selectors
123
and
124
by way of the register
121
, and the signal (intB) received by way of the pin B is output to the selectors
123
and
124
by way of the register
122
. Since the M_ENA signal is low, the selector
123
outputs the signal (intA) received by way of the register
121
(pin A) to the input terminal “a,” and the selector
124
outputs the signal (intB) received by way of the register
122
(pin B) to the input terminal “b.”
In contrast, as shown in
FIG. 12B
, when the M_ENA signal is high, the signal (intB) received by way of the pin A is output to the selectors
123
and
124
by way of the register
121
, and the signal (intA) received by way of the pin B is output to the selectors
123
and
124
by way of the register
122
. Since the M_ENA signal is high, the selector
123
outputs the signal (intA) received by way of the register
122
(pin B) to the input terminal “a,” and the selector
124
outputs the signal (intA) received by way of the register
121
(pin A) to the input terminal “b.”
As mentioned above, in an upwardly-bent mode such as that shown in
FIG. 12A
, the signal received by way of the pin A is output to the input terminal “a,” and the signal received by way of the pin B is output to the input terminal “b.” In a downwardly-bent mode such as that shown in
FIG. 12B
, the signal received by way of the pin A is output to the input terminal “b,” and the signal received by way of the pin B is output to the input terminal “a.”
A method of testing the semiconductor device shown in
FIGS. 10A and 10B
will now be described.
FIG. 13
is a flowchart for testing the semiconductor device shown in
FIGS. 10A and 10B
. As shown in
FIG. 13
, upon completion of assembly of a semiconductor chip such as that shown in
FIG. 10
, the M_ENA signal is brought to low, and the semiconductor chip is subjected to a full-function test for the upwardly-bent mode.
During the full-function test, the semiconductor device is subjected to, e.g., a conductivity check for checking the conduction of wiring patterns, a DC test for checking a correct electric current flowing through a predetermined location, a function test for testing the functions of the semiconductor device, and speed item selection in which a semiconductor chip is selected according to its performance.
Next, the M_ENA signal is brought to high, and the semiconductor device is subjected to a full-function test for the downwardly-bent mode. As in the case of the full-function test for the upwardly-bent mode, during the full-function test for the downwardly-bent mode the semiconductor chip is subjected to the conductivity check, the DC test, the function test, and the speed item selection.
In the foregoing conventional semiconductor device, the internal circuit performs the same operations regardless of whether the semicondu
Coleman William David
Fabruyl Wael
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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