Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S029000

Reexamination Certificate

active

07400007

ABSTRACT:
A power MOSFET includes an n-type drift layer and a p-type base layer formed in a layered manner on the n-type drift layer. Trench gates are formed to penetrate the p-type base layer to reach the n-type drift layer. On the p-type base layer, n+-type source regions and p+-type regions are formed. These n+-type source regions and p+-type regions are arranged alternately along a longitudinal direction of the trench gates. The n+-type source regions and the p+-type regions are arranged with a slant with respect to the longitudinal direction of the trench gates.

REFERENCES:
patent: 5329142 (1994-07-01), Kitagawa et al.
patent: 5448083 (1995-09-01), Kitagawa et al.
patent: 5585651 (1996-12-01), Kitagawa et al.
patent: 5689121 (1997-11-01), Kitagawa et al.
patent: 5838026 (1998-11-01), Kitagawa et al.
patent: 6060747 (2000-05-01), Okumura et al.
patent: 6787848 (2004-09-01), Ono et al.

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