Semiconductor device

Details Semiconductor device Semiconductor device

2011-06-21

2011-06-21

Gurley, Lynne A (Department: 2811)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE27108, C257SE21190, C257S204000, C257S024000, C438S216000

Reexamination Certificate

active

07964489

ABSTRACT:
A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×1020cm−3or more to 1×1022cm−3or less.

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Kensuke Takahashi, et al., “Dual Workfunction Ni-Silicide/HfSiON Gate Stacks by Phase-Controlled Full-Silicidation (PC-FUSI) Technique for 45nm-node LSTP and LOP Devices”, IEEE International Electron Devices Meeting, IEDM Technical Digest, Sep. 13-15, 2004, pp. 91-94 and 2 cover pages.
Hong-Jyh Li, et al., “Dual High-k Gate Dielectric With Poly Gate Electrode: HfSiON on nMOS and Al2O3Capping Layer on pMOS”, IEEE Electron Device Letters, vol. 26, No. 7, Jul. 2005, pp. 441-444.
Lee. High-K Gate Dielectrics. Microelectronics Research Center, ECE Department, The University of Texas at Austin, 2004.

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