Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2011-03-01
2011-03-01
Phan, Trong (Department: 2827)
Static information storage and retrieval
Addressing
Multiple port access
C365S230060, C365S205000, C365S207000, C365S208000, C365S189050
Reexamination Certificate
active
07898895
ABSTRACT:
A semiconductor device of the invention comprises: a memory cell array including memory cells formed at intersections between word lines and bit lines; first and second input/output ports each defined for inputting/outputting data of the memory cell array; sense amplifiers for amplifying data of the memory cells through the bit lines; a first select circuit which is controlled to be on/off by first select control lines extending in an intersecting direction to bit lines and is connected between the sense amplifiers and the first input/output port; a second select circuit which is controlled to be on/off by second select control lines extending along the bit lines and is connected between the sense amplifiers and the second input/output port; and first and second column decoders for selectively activating the first and second select control lines in response to an input column address.
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Elpida Memory Inc.
McGinn IP Law Group PLLC
Phan Trong
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