Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S494000, C257S495000, C257S544000, C257S343000

Reexamination Certificate

active

07999333

ABSTRACT:
In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.

REFERENCES:
patent: 6989566 (2006-01-01), Noda et al.
patent: 7098509 (2006-08-01), Zdebel et al.
patent: 7294901 (2007-11-01), Shimizu
patent: 7327007 (2008-02-01), Shimizu
patent: 1389918 (2003-01-01), None
patent: 09-260503 (1997-10-01), None
patent: 10-242452 (1998-09-01), None

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