Semiconductor device

Details Semiconductor device Semiconductor device

2011-05-10

2011-05-10

Tran, Tan N (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S311000, C257S316000, C257S317000, C257S325000

Reexamination Certificate

active

07939879

ABSTRACT:
For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.

REFERENCES:
patent: 5338957 (1994-08-01), Fukumoto et al.
patent: 5357134 (1994-10-01), Shimoji
patent: 5600163 (1997-02-01), Yano et al.
patent: 5751636 (1998-05-01), Naruke et al.
patent: 5824584 (1998-10-01), Chen et al.
patent: 6181597 (2001-01-01), Nachumovsky
patent: 6274901 (2001-08-01), Odake et al.
patent: 6400610 (2002-06-01), Sadd
patent: 6477083 (2002-11-01), Fastow et al.
patent: 6531735 (2003-03-01), Kamigaki et al.
patent: 6894344 (2005-05-01), Kamigaki et al.
patent: 2002/0109539 (2002-08-01), Takeuchi et al.
patent: 05-152579 (1993-06-01), None
patent: 06-037286 (1994-02-01), None
patent: 2000-049245 (2000-02-01), None
Kume et al, “Flash Memory Technology”, Ouyou Butsuri, vol. 65, p. 1114, 1996.
J.D.Bude et al, “EEPROM/Flash Sub 3.0V Drain-Source Bias Hot Carrier Writing”, IEEE International Electron Device Meeting 1995, p. 989-991.
Ogura et al, “Low Voltage, Low Current, High Speed Program Step Split Gate Cell with Ballistic Direct Injection for EEPRO/Flash”, IEEE International Electron Device Meeting, 1998, pp. 987-990.
T. Jung et al, “A.3.3V 128Mb Multi-Level NAND Flash Memory for Mass Storage Application”, IEEE International Solid-State Circuit Conference 1996, pp. 32-33, 1996.
M. Lorenzini et al, “A Dual Gate Flash EEPROM Cell with Two-Bit Storage Capacity”, IEEE Transactions on Components, Packaging, and Manufacturing Technology Part A, vol. 20, No. 2, p. 182, 1997.

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