Semiconductor device

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S371000

Reexamination Certificate

active

07978803

ABSTRACT:
An improved reception port for receiving packet data based on the IEEE 1394 standard. The reception port includes a synchronization FIFO memory for receiving reception data in accordance with a reception clock signal and synchronizing the reception data with an internal clock signal, a decoder for decoding the synchronized reception data, and a shaping FIFO memory for outputting the decoded reception data at a fixed timing.

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