Semiconductor device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S051000, C365S063000, C365S195000, C365S230010

Reexamination Certificate

active

07983109

ABSTRACT:
A phase change memory capable of highly reliable operations is provided. A semiconductor device has a memory array having a structure in which memory cells are stacked including memory layers using a chalcogenide material and diodes, and initialization conditions and write conditions are changed according to the layer in which a selected memory cell is positioned. The initialization conditions and write conditions (herein, reset conditions) are changed according to the operation by selecting a current mirror circuit according to the operation and by a control mechanism of a reset current in a voltage select circuit and the current mirror circuit.

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Kwang-Jin Lee et al., “A 90nm 1.8V 512Mb Diode-Switch PRAM with 266MB/s Read Throughput”, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, USA, 2007, pp. 472-473 and 616.

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