Semiconductor device

Static information storage and retrieval – Associative memories – Ferroelectric cell

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36518905, G11C 1500

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active

060580380

ABSTRACT:
A memory device having a plurality of blocks, each of a plurality of blocks comprising a memory array having a plurality of word lines and a plurality of memory cells connected to the word lines, an associative cell array for outputting a hit signal by comparing a first address inputted thereto with internal data and a decoder circuit for selecting one line by decoding a second address and wherein one of the word lines is selected based on the line selected by the decoder circuit and the hit signal.

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patent: 5860097 (1999-01-01), Johnson et al.
1995 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 174-175, Feb. 1995.

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