Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2007-06-25
2011-11-01
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S230030
Reexamination Certificate
active
08050132
ABSTRACT:
A semiconductor device110has a plurality of memory cell blocks provided with a plurality of memory cells storing a predetermined amount of data. Each memory cell block has four or more inputs and outputs, and is internally provided with a read address decoder to the memory cell and a sense amplifier for amplifying a voltage in outputting outside. Each memory cell block is structured so as to store a truth table data for outputting a desired logic value in response to a specified address input, thereby operating as a logic circuit. The memory cell has a read word line correspondingly to the read address decoder. In the case when a voltage is applied to the read word line, the data that is held at that time is read from a read data line. The memory cell blocks are connected to each other such that the four or more outputs from one memory cell block are inputted to other four or more memory cell blocks through the sense amplifier.
REFERENCES:
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patent: 2000-49591 (2000-02-01), None
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International Search Report (ISR) for PCT/JP2007/062691 for Examiner consideration, citing foreign reference Nos. 3-4 listed above.
Chen Yoshimura LLP
Phung Anh
Taiyo Yuden Co. Ltd.
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