Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2009-08-13
2011-12-27
Pert, Evan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S395000, C257S396000, C257S408000, C257SE21435
Reexamination Certificate
active
08084831
ABSTRACT:
A semiconductor device according to one embodiment includes: an n-type transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first channel region formed in the semiconductor substrate under the first gate insulating film, and first source/drain regions formed in the semiconductor substrate on both sides of the first channel region, the first gate electrode comprising a first metal layer and a first conductive layer thereon; and a p-type transistor comprising a second gate electrode formed on the semiconductor substrate via a second gate insulating film, a second channel region formed in the semiconductor substrate under the second gate insulating film, and second source/drain regions formed in the semiconductor substrate on both sides of the second channel region, the second gate electrode comprising a second metal layer and a second conductive layer thereon, the second metal layer being thicker than the first metal layer and having the same constituent element as the first metal layer.
REFERENCES:
patent: 2009/0206416 (2009-08-01), Cheng et al.
patent: 2010/0237445 (2010-09-01), Shima
P.D. Kirsch, et al., “Band Edge n-MOSFETs with High-k/Metal Gate Stacks Scaled to EOT=0.9nm with Excellent Carrier Mobility and High Temperature Stability”, IEEE IEDM Tech Digest, 2006, 4 pages.
F. Andrieu, et al., “Comparative Scalability of PVD and CVD TiN on HfO2as a Metal Gate Stack for FDSOI cMOSFETs down to 25nm Gate Length and Width”, IEEE IEDM Tech Digest, 2006, 4 pages.
Takeo Matsuki, et al., “Impact of Gate Metal-Induced Stress on Performance Modulation in Gate-Last Metal-Oxide-Semiconductor Field-Effect Transistors”, Japanese Journal of Applied Physics, vol. 46, No. 5B, 2007, pp. 3181-3184.
Goto Masakazu
Kawanaka Shigeru
Kabushiki Kaisha Toshiba
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Pert Evan
Wilson Scott R
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