Semiconductor device

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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Details

C365S148000, C365S046000, C365S063000

Reexamination Certificate

active

07742330

ABSTRACT:
For example, one memory cell is configured using two memory cell transistors and one phase change element by disposing a plurality of diffusion layers in parallel to a bit-line, disposing gates between the diffusion layers so as to cross the bit-line, disposing bit-line contacts and source contacts alternately to the plurality of diffusion layers arranged in a bit-line direction for each diffusion layer, and providing a phase change element on the source contact. Also, the phase change element can be provided on the bit-line contact instead of the source contact. By this means, for example, increase in drivability of the memory cell transistors and reduction in area can be realized.

REFERENCES:
patent: 2001/0044923 (2001-11-01), Kobayashi et al.
patent: 2003/0095426 (2003-05-01), Hush et al.
patent: 2003/0223283 (2003-12-01), Kunikiyo et al.
patent: 2004/0027851 (2004-02-01), Lai
patent: 2004/0062074 (2004-04-01), Ooishi et al.
patent: 2005/0111247 (2005-05-01), Takaura et al.
patent: 2005/0270832 (2005-12-01), Chu et al.
patent: 2003-297069 (2003-10-01), None
patent: 2004/127347 (2004-04-01), None
patent: 2005-071500 (2005-03-01), None
patent: 2005-510005 (2005-04-01), None
patent: 03/044802 (2003-05-01), None
“Ovonic Unified Memory—A High-Performance Nonvolatile Memory Technology for Stand-Alone Memory and Embedded Applications” by Gill, et al. 2002 IEEE.

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