Semiconductor device

Details Semiconductor device Semiconductor device

2006-05-17

2010-11-30

Sandvik, Benjamin P (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With bumps on ends of lead fingers to connect to semiconductor

C257SE23043

Reexamination Certificate

active

07843044

ABSTRACT:
Two vertical-type power MISFETs are formed over a semiconductor chip, a common drain electrode formed over a back surface of the semiconductor chip is electrically connected with a drain terminal via a conductive bonding material, source electrodes and gate electrodes formed over a surface of the semiconductor chip are respectively electrically connected with source terminals and gate terminals via bump electrodes, and these components are sealed by a resin sealing portion. The exposed portions of the gate terminals are arranged inside the resin sealing portion, and the exposed portions of the source terminals are arranged outside the resin sealing portion. The source terminals extend over the surface of the semiconductor chip and are connected with the source electrodes which are uniformly arranged over regions of the surface of the semiconductor chip except for gate electrode forming regions and the vicinities of these regions via the bump electrodes.

REFERENCES:
patent: 6249041 (2001-06-01), Kasem et al.
patent: 6429078 (2002-08-01), Kubo
patent: 6479888 (2002-11-01), Hirashima et al.
patent: 6774466 (2004-08-01), Kajiwara et al.
patent: 7285849 (2007-10-01), Cruz et al.
patent: 2004/0084776 (2004-05-01), Fukuda et al.

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