Semiconductor device

Details Semiconductor device Semiconductor device

2007-08-29

2009-10-20

Ho, Tu-Tu V (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S411000, C257S353000, C257SE29309, C257SE21180

Reexamination Certificate

active

07605422

ABSTRACT:
A semiconductor device capable of realizing low-voltage drivability and large storage capacity (miniaturization) by achieving large threshold voltage shifts and long retention time while at the same time suppressing variations in characteristics among memory cells is disclosed. The device includes a semiconductor memory cell having a channel region formed in a semiconductor substrate, a tunnel insulator film on the channel region, a charge storage insulator film on the tunnel insulator film, a control dielectric film on the charge storage film, a control electrode on the control dielectric film, and source/drain regions at opposite ends of the channel region. The memory cell's channel region has a cross-section at right angles to a direction along the channel length, the width W and height H of which are each less than or equal to 10 nm.

REFERENCES:
patent: 6037221 (2000-03-01), Lee et al.
patent: 6172397 (2001-01-01), Oonakado et al.
patent: 6963104 (2005-11-01), Wu et al.
patent: 2002/0100909 (2002-08-01), Yamaguchi et al.
patent: 2003/0042531 (2003-03-01), Lee et al.
patent: 2004/0264236 (2004-12-01), Chae et al.
patent: 2005/0051825 (2005-03-01), Fujiwara et al.
patent: 2005/0199944 (2005-09-01), Chen et al.
patent: 2006/0073657 (2006-04-01), Herner et al.
patent: 2006/0124991 (2006-06-01), Ohba
patent: 2006/0157754 (2006-07-01), Jeon et al.
patent: 2006/0193175 (2006-08-01), Khang et al.
patent: 2006/0237706 (2006-10-01), Enda et al.
patent: 2007/0012988 (2007-01-01), Bhattacharyya
patent: 2008/0157172 (2008-07-01), Lee
patent: 10-79442 (1998-03-01), None
patent: 2006-86206 (2006-03-01), None
patent: 2006-190990 (2006-07-01), None
patent: 2006-203200 (2006-08-01), None
patent: 2006-229223 (2006-08-01), None
patent: 2006-294940 (2006-10-01), None
patent: 3878681 (2007-02-01), None
patent: 1997-0004044 (1997-01-01), None
patent: WO 2004/112042 (2004-12-01), None
patent: WO 2006/062332 (2006-06-01), None
Masumi Saitoh, et al. “Effects of ultra-narrow channel on characteristics of MOSFET memory with silicon nanocrystal floating gates”, International Electron Devices Meeting (IEDM) Technical Digest, IEEE, 2002, 4 pages.
P.K. Ko, et al., “Enhancement of hot-electron currents in graded-gate-oxide(GG0)-MOSFETS”, IEDM 84, 1984, pp. 88-91.
Robert Bez, et al., “Introduction to Flash Memory”, Proceedings of the IEEE, vol. 91, No. 4, Apr. 2003, pp. 489-502.
Marvin H. White, et al., “On the Go with SONOS,” IEEE Circuits & Devices, Jul. 2000, pp. 22-31.

Affiliated with

Also associated with

Rating

Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4140851