Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-08-02
2009-08-11
Chaudry, M. Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S772000
Reexamination Certificate
active
07574648
ABSTRACT:
When the miniaturization of a DRAM advances, the capacity of a cell capacitor decreases, and further the voltage of a data line is lowered, the amount of read signals remarkably lowers, errors are produced during readout, and the yield of chips lowers. To solve the above problems, the present invention provides a DRAM that: has an error correcting code circuit for each sub-array; detects and corrects errors with said error correcting code circuit in both the reading and writing operations; and further has rescue circuits in addition to said error correcting code circuits and replaces a defective cell caused by hard error with a redundant bit.
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Akiyama Satoru
Sekiguchi Tomonori
Takemura Riichiro
Chaudry M. Mujtaba K
Hitachi , Ltd.
Miles & Stockbridge P.C.
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