Semiconductor device

Details Semiconductor device Semiconductor device

2006-07-27

2008-10-28

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S063000, C365S155000, C365S156000

Reexamination Certificate

active

07443717

ABSTRACT:
A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.

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