Semiconductor device

Static information storage and retrieval – Read/write circuit – Having fuse element

Reexamination Certificate

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Details

C365S096000, C365S200000

Reexamination Certificate

active

07411851

ABSTRACT:
A fuse peripheral circuit shown in FIG.2has a fuse10, a potential difference imparting circuit20, a potential difference reducing circuit30, a terminal40, a memory circuit50, a transfer gate60, and a logic gate70. The potential difference imparting circuit20is configured as having a transfer gate22(first transfer gate), a terminal24(first terminal) and a terminal26, so as to give a predetermined potential difference between both ends of the fuse10when disconnection of the fuse10is judged. The potential difference reducing circuit30is configured as having a transfer gate32(second transfer gate), a terminal34(second terminal) and a terminal36, and reduces the potential difference between both ends of the fuse10applied by the above-described potential difference imparting circuit20.

REFERENCES:
patent: 6489832 (2002-12-01), Kim et al.
patent: 6566937 (2003-05-01), Mori et al.
patent: 7030641 (2006-04-01), Tang et al.
patent: 2005/0169071 (2005-08-01), Kobayashi et al.
patent: 6-140510 (1994-05-01), None

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