Semiconductor device

Details Semiconductor device Semiconductor device

2004-08-04

2008-03-18

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S355000

Reexamination Certificate

active

07345345

ABSTRACT:
A CMOS semiconductor device having a triple well structure which can block latch-up by preventing parasitic thyristors from turning on is offered with reduced layout area. The CMOS semiconductor device includes a P-type silicon substrate, a first and a second deep N-type wells formed in a surface of the P-type silicon substrate and separated from each other, a P-type well formed in the first deep N-type well, a shallow N-type well formed in the second deep N-type well, an N-channel type MOS transistor formed on a surface of the P-type well and a P-channel type MOS transistor formed on a surface of the shallow N-type well.

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