Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-03-13
2007-03-13
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S194000, C365S233100
Reexamination Certificate
active
10833128
ABSTRACT:
A semiconductor device having a logic circuit, a delay circuit, and a processing circuit, wherein the logic circuit performs a logical operation process and outputs a first signal, the delay circuit delays an input signal and outputs a second signal, in parallel with the logical operation process of the logic circuit, and the processing circuit inputs the first signal and the second signal, and starts a process when both the first signal and the second signal are outputted.
REFERENCES:
patent: 4542454 (1985-09-01), Brcich et al.
patent: 5825706 (1998-10-01), Snowden et al.
patent: 6545311 (2003-04-01), Shukuri et al.
patent: 2004/0120204 (2004-06-01), Kanda et al.
patent: 2003168292 (2003-06-01), None
Arent & Fox PLLC
Fujitsu Limited
Lam David
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