Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Reexamination Certificate
2007-07-03
2007-07-03
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
C365S189020, C365S148000
Reexamination Certificate
active
11313833
ABSTRACT:
In a semiconductor device particularly including a phase change material, the reliability of the read-out operation is improved. In a read-out operation of a phase change memory, a bit line to be read out is precharged in advance with a sufficiently low voltage that can prevent the destructive read operation. In this state, after a word line is activated and a period in which the voltage is sufficiently discharged via a storage element which is in a low resistance state elapses (first read out), charge sharing is performed between the bit line and a read bit line of a sense amplifier which is precharged to a high voltage, and a read-out operation is performed again (second read out). Consequently, the read-out signal amount can be increased while suppressing the read current.
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Woo Yeong Cho et al., “A 0.18μm 3.0V 64Mb Non-Volatile Phase-Transition Random-Access Memory (PRAM),” 2004 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 40-41 (2004).
Miles & Stockbridge P.C.
Nguyen Tuan T.
Renesas Technology Corp.
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