Semiconductor device

Details Semiconductor device Semiconductor device

2007-03-20

2007-03-20

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S328000, C257SE27096

Reexamination Certificate

active

11033734

ABSTRACT:
In a semiconductor device in which gate trenches and source trenches are formed, when the semiconductor device is flatly viewed, N+type source areas are formed in parallel with the gate trenches to ease the miniaturization of the semiconductor device. P+type diffusion areas are separately formed in a direction orthogonal to the N+type source areas and the gate trenches. Thus, the N+type source areas and a P type body layer are formed in a laminated state, but the P+type diffusion areas are not laminated. Therefore, the structure of a mesa section is extremely simple. Furthermore, gate electrode films are connected to one another by a connection member. Thus, the semiconductor device has such a structure as to easily secure electric connection to each gate electrode film from outside. According to the foregoing structure, it is possible to extremely ease the miniaturization of the semiconductor device.

REFERENCES:
patent: 6060731 (2000-05-01), Murata et al.
patent: 6838735 (2005-01-01), Kinzer et al.
patent: 11-045998 (1999-02-01), None
patent: 2000-223708 (2000-08-01), None
Tsutomu Uesugi et al., “A New Power MOSFET having Excellent Avalanche Capability,” ISPSO'2000, May 22-25, Toulouse, France, pp. 349-352, IEEE (May 2000).

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