Semiconductor device

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Details

C326S057000, C326S113000, C326S083000, C326S080000

Reexamination Certificate

active

11116358

ABSTRACT:
In a semiconductor device in which an applying voltage higher than a power supply voltage VDD is inputted to a terminal BUS, when the voltage VBUS is less than a voltage of the power supply voltage VDD plus a threshold voltage Vthp, a voltage obtained by subtracting a threshold voltage Vthn from the power supply voltage VDD is applied to the gate terminal G4and the PMOS transistor P4becomes conductive. The power supply voltage VDD is supplied to the gate terminal G2to turn the PMOS transistor P2off. When the voltage VBUS is equal to or higher than the voltage of the power supply voltage VDD plus the threshold voltage Vthp, the voltage VBUS is supplied to the gate terminal G4to turn the PMOS transistor P4off, and the PMOS transistor P3conducts and supplies the voltage VBUS to the gate terminal G2to turn the PMOS transistor P4off. The voltage level is correctly maintained without an undesirable leak current from the terminal BUS regardless of the applying voltage VBUS.

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