Semiconductor device

Details Semiconductor device Semiconductor device

1996-05-01

1997-06-10

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 57, 257 66, 257349, H01L 2701, H01L 2712, H01L 310392

Patent

active

056378998

ABSTRACT:
An SOI-MOS transistor structure is obtained which enables prevention of a substrate floating effect, reduction of the gate capacity and the contact resistance, and connection of two or more transistors in series. A semiconductor device including this transistor includes a pair of n.sup.+ type source/drain regions and a p.sup.+ type channel potential fixing region formed by dividing an active region by a first wiring and a second wiring, and a third wiring and a fourth wiring extending from respective side portions of the wirings. Since holes stored in an effective channel region flow in the p.sup.+ type channel potential fixing region, the substrate flowing effect can be prevented. Since one region of the pair of n.sup.+ type source/drain regions is wider than the other region, the contact resistance can be decreased. Further, since the gate wirings are not connected to each other, transistors can be connected in series.

REFERENCES:
"Silicon-on-Insulator Technology" J. Colinge pp. 102-105 Kluwer Academic Publishers.
Handotai Kenkyu 40, published by Kogyuchosakai pp. 166-167, publication date unknown.

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