Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-07-18
2006-07-18
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189110, C365S194000, C365S196000
Reexamination Certificate
active
07079443
ABSTRACT:
A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.
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Eto Satoshi
Hasegawa Masatomo
Ishii Yuki
Kanou Hideki
Kawabata Kuninori
Arent & Fox PLLC
Fujitsu Limited
Tran Andrew Q.
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