Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2006-01-24
2006-01-24
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S762000
Reexamination Certificate
active
06989583
ABSTRACT:
A semiconductor device containing a multi-layered wiring structure formed on a semiconductor substrate, the structure including at least two wiring layers formed in an interlayer insulation layer, and each of the wiring layers including a metal wiring made of one of Cu and a Cu alloy, wherein the multi-layered wiring structure comprises a lower wiring layer formed under the interlayer insulation layer, a via buried in the interlayer insulation layer to connect an upper wiring layer and the lower wiring layer, and a dummy via buried in the interlayer insulation layer, the dummy via being not connected to the upper wiring layer.
REFERENCES:
patent: 6670714 (2003-12-01), Miyamoto et al.
patent: 6693049 (2004-02-01), Iguchi et al.
patent: 6846227 (2005-01-01), Sato et al.
Abraham Fetsum
Kabushiki Kaisha Toshiba
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