Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Reexamination Certificate
2006-03-14
2006-03-14
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
C257S192000, C257S217000, C257S280000, C257S379000, C257S536000
Reexamination Certificate
active
07012285
ABSTRACT:
A semiconductor device whose insertion loss is reduced and isolation characteristics are improved in a high frequency band by reducing the capacitance component when an FET is off is provided. FETs (30a,30b) having a gate electrode with a gate length of not more than 0.8 μm are formed on a semiconductor substrate in which a buffer layer (24) having an impurity concentration of at least 1010cm−3and at most 1014cm−3is formed on a semi-insulating semiconductor (25) having at least 1014cm−3and at most 1016cm−3p-type or n-type impurities and an active layer (23) having a p-type or n-type impurity concentration of at least 1015cm−3and at most 1017cm−3is formed on the buffer layer. N FETs are combined with each other, and when 1≦m≦n−1 (n and m are integers, n>1), a drain terminal of an m-th FET is connected to a source terminal of an (m+1)th FET, resistors (41a,41b) are connected to the gate electrodes of all of the first to n-th FETs, and all of the other ends of the resistors are coupled to the same electric potential.
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Inamori, et al.“A New GaAs Variable-Gain Amplifier MMIC with a Wide-Dynamic-Range and Low-Voltage-Operation Linear Attenuation Circuit”, IEEE Transactions on Micorwave Theory and techniques vol. 48, No. 2, pp. 182-186, Feb. 2000.
Kitazawa Takahiro
Nakatsuka Tadayoshi
Tambo Toshiharu
Tamura Akiyoshi
Tara Katsuyoshi
Matsushita Electric - Industrial Co., Ltd.
Merchant & Gould P.C.
Warren Matthew E.
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