Semiconductor device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S200000

Reexamination Certificate

active

07054214

ABSTRACT:
A dummy cell includes a plurality of first memory cells MC for storing “1” or “0”, arranged at points of intersection between a plurality of word lines WR0to WR7and a plurality of first data lines D0to D7, a plurality of first dummy cells MCH for storing “1” or “0”, arranged at points of intersection between the word lines WR0to WR7and a first dummy data line, and a plurality of second dummy cells MCL for storing “0”, arranged at points of intersection between the word lines WR0to WR7and a second dummy data line DD1.

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