Semiconductor device

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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Details

C365S230030, C714S764000

Reexamination Certificate

active

06977858

ABSTRACT:
A semiconductor device comprises, a plurality of memory cells, and an error-correction circuit, wherein write operation is performed by a late-write method, and ECC processing is executed in parallel with writing, and thereby cycle time is shortened. Moreover, it is better that when a memory cell is power supplied through a well tap, the same address is not assigned while the memory cell is power supplied through the well tap.

REFERENCES:
patent: 4748627 (1988-05-01), Ohsawa
patent: 6026014 (2000-02-01), Sato et al.
patent: 6714471 (2004-03-01), Kono
patent: 61-50295 (1984-08-01), None
patent: 7-45096 (1993-08-01), None

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