Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Reexamination Certificate

active

06849900

ABSTRACT:
A semiconductor device includes: a semiconductor substrate of a first conductivity type; a semiconductor layer of a first conductivity type formed on a first main surface of the semiconductor substrate, the semiconductor layer including a first region for a cell portion and a second region for a terminating portion, the second region being positioned in an outer periphery of the first region, the terminating portion maintaining breakdown voltage by extending a depletion layer to relieve an electric field; junction pairs of semiconductor layers periodically arranged so as to form a line from the first region to the second region in a first direction parallel to the first main surface in the semiconductor layer and having mutually opposite conductivity types of impurities, each of the junction pair being composed of a first impurity diffusion layer of a second conductivity type formed from a surface of the semiconductor layer toward the semiconductor substrate and a second impurity diffusion layer of a first conductivity type formed from the surface of the semiconductor layer toward the semiconductor substrate and adjacently to the first impurity diffusion layer; a base layer of a second conductivity type selectively formed on each surface layer of the junction pairs which are formed in the first region, so as to connect with the first impurity diffusion layer and the second impurity diffusion layer in the same manner; a source layer of a first conductivity type selectively formed on each surface layer of the base layers of the second conductive type; a control electrode formed above each surface of the base layers and above each surface of the source layers via an insulating film; a first main electrode formed so as to cover the control electrode and to contact the source layers and the base layers in the same manner; and a second main electrode formed on a second main surface opposite to the first main surface of the semiconductor substrate.

REFERENCES:
patent: 4754310 (1988-06-01), Coe
patent: 5216275 (1993-06-01), Chen
patent: 5438215 (1995-08-01), Tihanyi
patent: 5831317 (1998-11-01), Shimazaki
patent: 6410958 (2002-06-01), Usui et al.
patent: 8-222735 (1996-08-01), None
patent: 10-223896 (1998-08-01), None
patent: 2000-269518 (2000-09-01), None
patent: 2000-277726 (2000-10-01), None
patent: 2001-15752 (2001-01-01), None
patent: 2001-135819 (2001-05-01), None
patent: 2001-298190 (2001-10-01), None
patent: 2001-298191 (2001-10-01), None
patent: 2002-110693 (2002-04-01), None
patent: 2002-170955 (2002-06-01), None
patent: 2002-217415 (2002-08-01), None
patent: 2002-280555 (2002-09-01), None

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